Zhengyuan Shi (石正源, Stone) will join XXX as Tenure-Track Assistant Professor in Dec. 2026. I obtained my Ph.D. degree from The Chinese University of Hong Kong (CUHK), where I was supervised by Prof. Qiang Xu. Prior to that, I received my B.Eng. degree with presidential scholarship from Shandong University in 2021, supervised by Prof. Gangqiang Yang.

I have published more than 40 papers at top-tier conferences and journals, including DAC, ICCAD, TCAD and SCIS. I have also served as TPC member for several conferences and reviewer for journals.

My research focuses on AI/LLM for Electronic Design Automation (EDA) and Constraint Programming (CP), specifically in the following directions:

• EDA:

🔥 News

• 2026.02:  🎉🎉 Two papers were accepted by DAC 2026. But I may not attend the conference this year 😭.
• 2026.01:  🎉🎉 I was honored to receive the Best Poster Award at SRF of ASPDAC 2026.
• 2025.09:  🎉🎉 Two papers were accepted by ASPDAC 2026 (I can’t wait to the magical visit to HK Disneyland~).
• 2025.08:  🎉🎉 Our SAT solver Kissat-CURE wins the 3rd prize in SAT Competition Main Track.
• 2025.06:  🎉🎉 Two papers DeepCell and MMCircuitEval were accepted by International Conference on Computer-Aided Design (ICCAD).
• 2025.06:  👉👉 I was selected to attend CP/SAT Doctoral Program and present our work Circuit Learning for Boolean Satisfiability Problems. Thanks for the travel support from Association for Constraint Programming (ACP).
• 2025.05:  🎉🎉 Our paper DynamicSAT: Dynamic Configuration Tuning for SAT Solving was accepted by International Conference on Principles and Practice of Constraint Programming (CP). The paper received excellent reviews, including two perfect scores (5/5/4 out of 5).
• 2025.04  👉👉 My poster of my PhD topic Large Circuit Model: Towards AI-Native EDA Methodology was accpeted by Design Automation Conference (DAC) PhD Forum with 1,000$ travel grant support.
• 2025.02:  🎉🎉 Our paper Logic Optimization Meets SAT: A Novel Framework for Circuit-SAT Solving was accepted by Design Automation Conference (DAC).
• 2025.01:  🎉🎉 Our paper DeepSeq2: Enhanced Sequential Circuit Learning with Disentangled Representations Link was nominated as Best Paper in Asia and South Pacific Design Automation Conference (ASPDAC).
• 2024.11:  👉👉 Our paper about Large Circuit Model, an AI-native foundation model for EDA, was published in Science China Information Science 微信公众号

📝 Publications

Publication Summary: DAC+ICCAD x8, DATE+ASPDAC x6

Conference Publication

• [C24] Miter-Aware LUT Mapping: Aligning Structure for Efficient Logic Equivalence Checking, Jiaying Zhu, Zhengyuan Shi, et. al,
• [C23] Beyond Flat Netlist: Hierarchical Graph Representation Learning for Scalable Analysis of Sequential Circuits, Jingyi Zhou, Zhengyuan Shi, Ziyang Zheng, et. al,
• [C22] DynamicRTL: RTL Representation Learning for Dynamic Circuit Behavior, Ruiyang Ma, Yunhao Zhou, Yipeng Wang, Yi Liu, Zhengyuan Shi, et. al,
• [C21] Functional Matching of Logic Subgraphs: Beyond Structural Isomorphism, Ziyang Zheng, Kezhi Li, Zhengyuan Shi, Qiang Xu, International Conference on Neural Information Processing Systems (NeurIPS)
• [C20] DeepCut: Structure-Aware GNN Framework for Efficient Cut Timing Prediction in Logic Synthesis, Lingfeng Zhou, Yilong Zhou, Zhengyuan Shi, et. al, Asia and South Pacific Design Automation Conference (ASPDAC)
• [C19] AC-Refiner: Efficient Arithmetic Circuit Optimization Using Conditional Diffusion Models, Chenhao Xue, Kezhi Li, Jiaxing Zhang, Zhengyuan Shi, et. al, Asia and South Pacific Design Automation Conference (ASPDAC)
• [C18] DeepCell: Multiview Representation Learning for Post-Mapping Netlists, Zhengyuan Shi, Chengyu Ma, Ziyang Zheng, et. al, ICCAD 2025.
• [C17] MMCircuitEval: A Comprehensive Multimodal Circuit-Focused Benchmark for Evaluating LLMs, Chenchen Zhao, Zhengyuan Shi, Xiangyu Wen, et. al, ICCAD 2025.
• [C16] DynamicSAT: Dynamic Configuration Tuning for SAT Solving, Zhengyuan Shi, Wentao Jiang, Xindi Zhang, et. al, CP 2025.
• [C15] Logic Optimization Meets SAT: A Novel Framework for Circuit-SAT Solving, Zhengyuan Shi, Tiebing Tang, et al. DAC 2025.
• [C14] DeepCircuitX: A Comprehensive Repository-Level Dataset for RTL Code Understanding, Generation, and PPA Analysis, Zeju Liu, Changran Xu, Zhengyuan Shi, et al. ICLAD 2025.
• [C13] DeepRTL2: A Versatile Model for RTL-Related Tasks, Yi Liu, Hongji Zhang, Yunhao Zhou, Zhengyuan Shi, et al. ACL (Findings) 2025
• [C12] ForgeEDA: A Comprehensive Multimodal Dataset for Advancing EDA, Zhengyuan Shi, Zeju Li, Chengyu Ma, et al. ISEDA 2025.
• [C11] WideGate: Beyond Directed Acyclic Graph Learning in Subcircuit Boundary Prediction, Jiawei Liu, Zhiyan Liu, Xun He, Jiangwang Zhai, Zhengyuan Shi, et al. DATE 2025.
• [C10] DeepSeq2: Temporal Correlations Aware Sequential Circuit Learning, Sadaf Khan, Zhengyuan Shi, Min Li and Qiang Xu, ASPDAC 2025.
• [C9] DeepGate4: Efficient and Effective Representation Learning for Circuit Design at Scale, Ziyang Zheng, Shan Huang, Jianyuan Zhong, Zhengyuan Shi, et. al, ICLR 2025.
• [C8] DeepGate3: Towards Scalable Circuit Representation Learning, Zhengyuan Shi, Ziyang Zheng, Jianyuan Zhong, et al. ICCAD 2024.
• [C7] DeepSeq: Deep Sequential Circuit Learning, Sadaf Khan, Zhengyuan Shi, et al. DATE 2024.
• [C6] DeepGate2: Functionality-Aware Circuit Learning, Zhengyuan Shi, Hongyang Pan, et. al, ICCAD 2023.
• [C5] SATformer: Transformers for UNSAT Solving, Zhengyuan Shi, Min Li, et. al, ICCAD 2023.
• [C4] On EDA-Driven Learning for SAT Solving, Min Li, Zhengyuan Shi, et. al, DAC 2023.
• [C3] DeepTPI: Test Point Insertion with Deep Reinforcement Learning, Zhengyuan Shi, Min Li, et al. ITC 2022.
• [C2] DeepGate: Learning Neural Representations of Logic Gates, Min Li, Sadaf Khan, Zhengyuan Shi, et al. DAC 2022.
• [C1] Testability-Aware Low Power Controller Design with Evolutionary Learning, Min Li, Zhengyuan Shi, et al. ITC 2021.

Journal Publication

• [J4] The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models. Science China Information Science (SCIS), 2024.
• [J3] Customized FPGA Implementation of Authenticated Lightweight Cipher Fountain for IoT Systems, Zhengyuan Shi, Cheng Chen, Gangqiang Yang et al. ACM Transactions on Embedded Computing Systems (TECS), 2024
• [J2] Hardware Optimizations of Fruit-80 Stream Cipher: Smaller than Grain, Zhengyuan Shi, Gangqiang Yang, et al. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 2023
• [J1] Design Space Exploration of Galois and Fibonacci Configuration based on Espresso Stream Cipher, Zhengyuan Shi, Cheng Chen, Gangqiang Yang, et al. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 2023

🎖 Honors and Awards

Acadamic Awards

• 2026.01 Best Poster Award, Asia and South Pacific Design Automation Conference (ASPDAC)
• 2025.01 Best Paper Award Nominee, Asia and South Pacific Design Automation Conference (ASPDAC)
• 2022.06 Best Paper Award Nominee, Design Automation Conference (DAC)
• 2021.04 Outstanding Undergraduate Thesis Award, Shandong University

📖 Educations

• 2021.08 - 2026.01, Ph.D. Candidate, Department of Computer Science and Engineering, The Chinese University of Hong Kong.
• 2017.09 - 2021.06, B.Eng. in Information Engineering, School of Information Science and Engineering, Shandong University.

🎙️ Invited Talks

• 2026.01, Learning Circuit Intuition for Smart Design Automation, IEEE CEDA Guangzhou Chapter.
• 2025.10, Foundation Models and EDA Workshop, ICCAD.
• 2025.01, Young Scholars Forum of the School of Electronic and Computer Engineering, Peking University (PKU)
• 2024.10, Qilu Youth Forum, Shandong University (SDU)
• 2024.06, Large Circuit Model for Formal Verification, National Technology and Innovation Center of EDA
• 2024.05, Tutorial: Boolean Satisfiability Solving State-of-the-Art, Internal Symposium of Electronics Design Automation (ISEDA)

💻 Teaching

• Teaching Assistant, Embedded System Development and Applications (CENG4480) / Embedded System Design (CENG2400), CUHK
• Teaching Assistant, Applied Blockchain and Cryptocurrencies (FTEC5520), CUHK

😘😘😘

My love 💗: Yiran Liu, Ph.D. candidate in the Faculty of Business Administration, University of Macau.